Researchers tested a new kind of neural network that learns logic directly and found it can run much more cheaply and robustly on detector hardware than conventional designs. The work targets on‑chip data selection for future particle physics pixel detectors, where raw data rates are too high to send off‑board and detectors change over time because of radiation damage.

The models they study are called logic neural networks (LNNs). Instead of doing arithmetic like usual neural nets, LNNs learn Boolean functions — the same kind of small logic operations used in digital circuits. That makes the learned model easy to turn into actual gate-level hardware. During training the gates are handled in a smooth, differentiable way so the models can be learned with standard methods; at inference time the learned logic becomes a fixed digital circuit.

To test the idea the team used the public SmartPixels datasets. They compared a quantized arithmetic baseline (built with QKeras) to dense and convolutional LNNs. All LNNs used 2-input lookup tables (logic gates) and a threshold encoding of inputs. The trained LNNs were converted to hardware descriptions and synthesized for a Xilinx VU13P field‑programmable gate array (FPGA) as a stand‑in for custom silicon. To estimate pure logic cost they disabled the FPGA’s dedicated multiply blocks and reported the combined count of lookup tables and flip‑flops (LUTs+FFs).

The hardware and accuracy numbers show a large gap. A dense LNN reached a balanced accuracy of 0.807 while using 14,418 LUTs+FFs. The quantized arithmetic baseline reached 0.798 balanced accuracy but required 275,815 LUTs+FFs — roughly 19 times more logic. A convolutional LNN that processed eight time profiles (105 inputs) achieved balanced accuracy above 0.84 while still remaining in the tens‑of‑thousands of LUTs+FFs. The authors also tested random input bit flips to mimic radiation faults; without special fault training the LNNs’ accuracy degraded more slowly than the arithmetic models.